【IEEE CAS-04 広報】IEICE英文論文誌C（アナログ回路特集号）論文募集締切延長のお知らせ
IEEE CAS Society Japan Joint Chapter会員各位
IEEE CAS Society Tokyo/Hiroshima/Nagoya/
Sendai/Shin-Etsu/Japan Council Joint Sections Chapter
(IEEE CAS Society Japan Joint Chapter)
Chair 高橋 篤司
各位におかれましては，
先日ご案内いたしました電子情報通信学会 英文誌のアナログ回路特集号
（2021年10月掲載）
改めてご案内いたします。
関係されるみなさまにおかれましては、
何卒よろしくお願い申し上げます。
--------------------------------------------- 研究者の皆様 ＃複数お受け取りの場合は，ご容赦ください． IEICE英文誌Cアナログ回路特集号の投稿締切を延長致しましたので、 ご案内させていただきます。 投稿締切：10/19(月) → 11/9(月) https://www.ieice.org/event/ronbun-e.php?society=es ぜひ多数の論文のご投稿をよろしくお願いいたします。 また、今年度投稿のしおりが改訂され、 参考文献が30以上ない論文については、受け付けることができないことになりました点、 ご注意ください。 https://www.ieice.org/eng/shiori/page2_es.html#3-7<https://clicktime.symantec.com/3nFkfvARqhES7Jqf1q8PJE7Vc?u=https%3A%2F%2Fwww.ieice.org%2Feng%2Fshiori%2Fpage2_es.html%233-7> ---- Call for Papers：Special Section on Analog Circuits and Their Application Technologies ----- The IEICE Transactions on Electronics announces a forthcoming Special Section on Analog Circuits and Their Application Technologies to be published in October 2021. The rapid progress of IoT (Internet of Things) demands the evolution of integrated circuits in many fields such as information system, health / biomedicine, and energy management. Recent analog circuits and its integration technologies have made a great contribution in these fields. Challenges toward enhanced functionality as well as excellent performance of analog circuits, while keeping low power and low cost, are strongly demanded for the next generation applications. In addition to pure analog circuit techniques, the scope of this special section includes fundamental issues such as co-design of analog and digital circuits, analog circuits in SoC environments, analog circuit design for manufacturability (DFM) and testability (DFT), device modeling technologies and hardware security. The papers without either chip implementation or measurement results are also welcome. Authors working in this area are invited to submit original research papers on topics, which include, but are not limited to: Ø Circuit techniques for wireless/wired/optical communication systems Ø RF circuits and broadband circuits Ø Low-power/low-voltage circuits Ø High-speed/high-precision ADCs and DACs Ø Amplifiers, oscillators, PLLs, voltage references, and power management circuits Ø Analog/RF integration techniques for SoCs Ø Assembly related topics (electronic packaging, SiP, module, EMC, supply noise, ground noise, digital noise, etc.) Ø Mixed-signal integration applications (RFID, storage devices, tuners, automotive, sensor and MEMS interfaces, biomedicine and healthcare, etc.) Ø Analog techniques for high performance (high frequency ESD structures, power supply circuits, etc.) Ø Device modeling techniques Ø Device technologies for analog circuits (CMOS, BiCMOS, compound semiconductor, MEMS, etc.) Ø Design for manufacturability (DFM) and/or testability (DFT) of analog circuits Ø Hardware security Theoretical papers which do not include chip implementation and its measurement results are also welcome. Submission due date is October 19 November 9, 2020. This special section will accept only PAPERs and BRIEF PAPERs by electronic submission. Prospective authors are requested to follow carefully the submission process described below. Submit a paper using the IEICE Web site https://review.ieice.org/regist/regist_baseinfo_e.aspx. Authors should choose the [Special-CT] Analog Circuits and Related Technologies as the "Journal/ Section" on the online screen. Do not choose [Regular-EC]. Inquiries: Yohei Nakamura Hitachi Ltd. Tel : +81-42-323-1111, Email : yohei.nakamura.sj@hitachi.com It is recommended that PAPER be within eight pages in length. The maximum number of pages for the initial submission of a BRIEF PAPER must be 4. Manuscripts should be prepared according to the "Information for Authors," the latest version of which is available at: https://www.ieice.org/eng/shiori/mokuji_es.html. Special Section Editorial Committee Guest Editor-in-Chief: Takashi Oshima (Hitachi) Guest Editors: Yohei Nakamura (Hitachi), Nicodimus Retdian (Shibaura Inst. of Technology) Guest Associate Editors: Tetsuya Iizuka (Univ. of Tokyo), Hiroaki Ishihara (Toshiba), Masao Ito (Renessas Electronics), Hiroyuki Ito (Tokyo Inst. of Technology), Kenichi Okada (Tokyo Inst. of Technology), Tohru Kaneko (Asahi Kasei Microdevices), Masaki Sakakibara (Sony Semiconductor Solutions), Takahide Sato (Univ. of Yamanashi), Hao San (Tokyo City Univ.), Zule Xu (Univ. of Tokyo), Nobukazu Takai (Gunma Univ.), Takahiro Nakamura (Hitachi), Daisuke Kanemoto (Osaka Univ.), Ryuichi Fujimoto (Kioxia), Tatsuji Matsuura (Tokyo Univ. of Science), Tadashi Minotani (NTT), Masaya Miyahara (KEK), Cosy Muto (Nagasaki Univ.), Takuji Miki (Kobe Univ.), Keita Yasutomi (Shizuoka Univ.), Takafumi Yamaji (Sojo Univ.), Ryuji Yoshimura (Rohm) [IMPORTANT NOTICE] *Authors must agree to the "Copyright Transfer and Page Charge Agreement" via electronic submission. * Upon accepted for publication, all authors, including authors of invited papers, should pay the page charges covering partial the cost of publication around March 2021. If payment is not completed by 15 April 2021, your manuscript will be handled as rejection. * The accepted papers will be published online soon on the web site of Transactions Online after the payment of page charges has been completed. For detailed information, please visit https://www.ieice.org/eng/shiori/page2_es.html#8 *At least one of the authors must be an IEICE member when the manuscript is submitted for review. Invited papers are an exception. We recommend that authors unaffiliated with IEICE apply for membership. For details, please visit the web-page, https://www.ieice.org/eng/join_ieice/index.html. -------------------------------------------------------------------------------------------------------
