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Mobile/Embedded Deep-Neural Network (DNN) and Artificial Intelligence (AI) System-on-Chip (SoC)

Recently, Deep Neural Networks (DNN) are changing not only the technology paradigm in electronics but also the society itself with Artificial Intelligence (AI) technologies.

In this lecture, firstly, the status of AI and DNN SoCs will be reviewed from two perspectives; the data-center oriented and the mobile and embedded AIs. This dichotomy shows clearly the possible application areas for the emerging future AIs. Especially, mobile and embedded deep learning hardware will be introduced together with Convolutional Neural Network (CNN) and Recurrent Neural Network (RNN). In addition, real CMOS chip implementation results of mobile/embedded DNNs will be explained with measurement results.

Secondly, KAIST’s approach integrating both sides of brain, right-brain for“approximation and adaptation hardware” and left-brain for“precise and programmable Von Neumann architecture”, will be explained with novel design methodology. The deep neural networks and the specialized intelligent hardware (mimicking right brain) capable of statistical processing or learning and the multi-core processors (mimicking left brain) performing the precise computations including software AI are integrated on the same SoC. Based on this brain-mimicking SoCs, the object recognition and the augmented reality applications are implemented with low-power and high-performance for wearable devices such as smart glasses, autonomous vehicles, and intelligent robots.

Date and Time

• Date: 14 December 2018
• Time: 02:00 PM to 03:00 PM
• All times are Singapore
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Location

• National University of Singapore Faculty of Engineering Block E5, 4 Engineering Drive 4
• Singapore, Singapore
• Singapore 117575
• Room Number: Room E5-02-32

Contact

• Email event contact
• Co-sponsored by IEEE SSCS Singapore Chapter, National University of Singapore

Speakers

Hoi-Jun Yoo is the KAIST ICT Endowed Chair Professor, School of Electrical Engineering, Korea Advanced Institute of Science and Technology (KAIST). He was the VCSEL pioneer in Bell Communications Research at Red Bank, NJ. USA and Manager of DRAM design group at Hyundai Electronics designing from 1M DRAM to 256M SDRAM. Currently, he is a full professor of Department of Electrical Engineering at KAIST and the director of the System Design Innovation and Application Research Center (SDIA). From 2003 to 2005, he served as the full time Advisor to the Minister of Korean Ministry of Information and Communication for SoC and Next Generation Computing.

His current research interests are Bio Inspired IC Design, Network on a Chip, Multimedia SoC design, Wearable Healthcare Systems, and high speed and low power memory. He has published more than 250 papers, and wrote or edited 5 books, “DRAM Design”(1997, Hongneung), “High Performance DRAM”(1999 Hongneung), “Low Power NoC for High Performance SoC Design”(2008, CRC), “Mobile 3D Graphics SoC”(2010, Wiley), and “BioMedical CMOS ICs”(Co-editing with Chris Van Hoof, 2010, Springer), and many chapters of books.

Dr. Yoo received Order of Service Merit from Korean government in 2011 for his contribution to Korean memory industry, Scientist/Engineer of this month Award from Ministry of Education, Science and Technology of Korea in 2010, Best Scholarship Awards of KAIST in 2011. He also received the Electronic Industrial Association of Korea Award for his contribution to DRAM technology in 1994, Hynix Development Award in 1995, the Korea Semiconductor Industry Association Award in 2002, Best Research of KAIST Award in 2007, and has been co-recipients of ASP-DAC Design Award 2001, Outstanding Design Awards of 2005, 2006, 2007, 2010, 2011, 2014 A-SSCC, Student Design Contest Award of 2007, 2008, 2010, 2011 DAC/ISSCC. He has served as a member of the executive committee of ISSCC, Symposium on VLSI, and A-SSCC. He also served as the IEEE SSCS Distinguished Lecturer ('10-'11) and the TPC chairs of ISSCC 2015, ISWC 2010 and A-SSCC 2008. He is an IEEE Fellow.