Joint Chapter of Circuits and Systems and Electron Devices Societies (CAS/EDS)

In collaboration with

 AMS Semiconductors India Pvt. Ltd – Hyderabad

Presents a Two day Industry workshop on

Analog IC Design – Concept to Reality

About the workshop:

Man made Digital. God made Analog. Everything we see, feel, hear is an analog signal which has a definite physical characteristics, frequency content and energy. In the process of extracting useful information in the presence of noisy unwanted signals, we need appropriate signal conditioning. Low-power and precision analog are necessary to design applications with higher performance and longer application lifetimes. The present workshop is designed to give a flavor of the entire IC product development flow and bridging the gap between real world requirements to IC requirements. This workshop is also intended to excite modern researchers to focus on CMOS Analog IC design including advanced topics like Reliability, ESD and EMC which are extremely important for product development.

Workshop Faculty:

A.G. Krishna Kanth(PhD): A.G.Krishna Kanth finished his B.Tech and M.Tech from IIT Bombay with Specialization in Microelectronics. He was awarded President of India Shankar Dayal Sharma gold medal and IIT Bombay Student Roll of Honor in 2002. Analog IC Design is his passion and his specialization includes power management, signal path processing, identifying key product differentiators with a special focus on automotive and consumer semiconductor IC design. He has been involved in complete product and IC development : "concept" to unlimited production including design, test and product development flow with special focus on automotive domain requirements. He is currently working as Senior Manager for Analog IC Design and Layout teams in AMS Semiconductors India. He worked earlier with Texas Instruments Bangalore and Qualcore Logic Hyderabad leading the Analog IC design teams. He is currently the Vice-Chair for IEEE CAS/EDS Hyderabad Chapter and is frequently involved in delivering technical lectures at various Universities as an IEEE Volunteer. He is an IEEE Senior Member and has 9 IEEE publications and 8 patents filed.

V. Veeresh Babu(PhD): V. Veeresh Babu has 15+ years of experience in the field of CMOS Analog design and has successful track record of delivering first-pass analog IC tapeouts. He completed his M.Tech from IIT Bombay in 2003. He worked as Team lead at QualcoreLogic during 2003 to 2006 where he has successfully taped out many PLLs IPs and a clock ICs. He started working for AMS from 2006 as Analog design engineer where he worked on high precision analog circuits such as voltage references, SAR ADC, Sigma delta ADC’s, high precision temperature sensors, DCDC converter focused on automotive design flow. He has a published patent, six IEEE publications and is the recipient of best paper award in VLSI design conference. He is currently working as design manager –Analog in AMS and also pursuing his part-time PhD research work with BITS Hyderabad. His research interests include Battery management systems, high precision band gap references and analog signal processing

S.Sudhakar: Sudhakar got his B.E from A.U college of Engineering from department of E.C.E in 1999 and M.Tech from IIT, Powai with Microelectronics as specialization in 2004. He worked in B.E.L, Bangalore for two years in FR & Synthesizers core design group form 2000 -2002. He also worked for in Qualcore logic Hyderabad for 3 years in the analog design group where he designed different analog subsystems like PLL’s , ADC’s, DAC’s  in different technology nodes. He has been with ams semiconductors India Pvt Ltd from 2007 and is currently working as Design Manager for Analog Team. His interests are low-noise analog circuit design, sigma-delta A/D’s design and SC circuits design for sensor and sensor interface signal conditioning circuits.

A.Ravi Kumar:A. Ravi Kumar received his Bachelor’s degree in ECE from JNTU Kakinada and Masters in VLSI from International Institute of Information Technology (IIIT). He has more than a 13 years design experience in high performance analog design such as sensor front end design, High precision references, and low noise/low power amplifiers in automotive, industrial and optical sensor domain. His research interests are high performance, low noise, low power sensor interface design. He has filed 10 patents and 3 publications related to the high accurate analog sensor interface.

Harshitha Penmetsa: Harshitha Penmetsa completed her Diploma in Elec. with Specialization in Industrial electronics and Instrumentation Engg. from GIOE in the year 2004. She joined Qualcore Logic as layout engineer and worked in TI Offshore development Centre for custom silicon layout of many ICs. She completed her Part Time B.Tech in Electronics and Communication Engg from JNTU Hyderabad in 2009.  She joined AMS Semiconductors India Pvt. Ltd in the year 2006 and since then she is responsible for custom Layout of IC from individual module to Chip integration, considering DRC, DFM, DFY, ESD  and EMC requirements of the chip. She also handles GDSII transfer to fabrication unit and has wide range of layout experience in many CMOS technology nodes.

Date:  Friday and Saturday, 31^st  August and 1^st September 2018 Time:  8.30 A.M to 5.00 P.M

Venue: Conference Hall, AMS semiconductors, 5^th Floor, C-Block, iLabs building, Opp. Inorbit Mall, Hitec City.

Registration Fee: Rs. 400 for IEEE Members, Rs. 500 for Non IEEE Members

Note: Registration fee includes Welcome kit, lunch and snacks for two days.

Last date for Registration is 10^th August. Selected Participants will be intimated by 15^th August for payment as workshop is restricted for 40 persons only. Selected  persons are requested to register online by paying registration fees at https://bit.ly/2L4uVY9.

For any further details please contact:

Workshop Coordinator:  Mr.Mohammed Arifuddin Sohel, Chair, IEEE CAS/EDS joint Chapter,9885 407094,  arif.sohel@mjcollege.ac.in

                                             Mr.A.G. Krishna Kanth, Vice Chair, IEEE CAS/EDS joint Chapter,9989644633, kk.avalur@ams.com

Analog IC Design workshop_Version5 (download pdf)