IEEE Electronics Packaging (EP) Tech Talk-Multi-physics Modeling for Flexible Hybrid Electronics

Dear All,
IEEE Electronics Packaging (EP) Society Bangalore Chapter (formerly CPMT) is happy to announce a technical talk on Thursday, 7th June 2018, at BHIVE HSR Layout Sect 6, Bangalore from 4:00 pm - 5:15 pm. You are cordially invited for the event.
https://bhiveworkspace.com/locations/hsr-layout-sector-6/
Pls note that BHIVE does not have vehicle parking space. You will have to park in the by-lanes.
Schedule of events:
4:00 - 5:00 pm - Technical Talk titled "Multi-physics Modeling for Flexible Hybrid Electronics " - Prof. Madhavan Swaminathan
5:00 - 5:15 pm - Tea/Coffee break
5:15 - 6:30 pm - IEEE EPS Executive Committee meeting (Only for exe-com members)
Abstract:
Flexible Hybrid Electronics (FHE) provides for an interesting solution for several IoT applications where the electronics can be made to conform to curved surfaces and be subjected to bending, stretching, folding, twisting etc. Under such conditions one would assume that the electrical, mechanical and thermal aspects of the problem interact with each other. If so, what are these interactions, are they important and how does one capture these effects in a compact model. This presentation will discuss some early work in the area of FHE modeling that can lead to the development of Process Design Kits (PDK) to ease the design process.
Biography of the Speaker:
Madhavan Swaminathan
John Pippin Chair in Microsystems Packaging & Electromagnetics
Director, Center for Co-Design of Chip, Package, System (C3PS)
School of Electrical and Computer Engineering, Georgia Tech, USA
Madhavan Swaminathan is the John Pippin Chair in Microsystems Packaging & Electromagnetics in the School of Electrical and Computer Engineering (ECE) and Director of the Center for Co-Design of Chip, Package, System (C3PS), Georgia Tech. He formerly held the position of Joseph M. Pettit Professor in Electronics in ECE and Deputy Director of the NSF Microsystems Packaging Research Center, Georgia Tech. Prior to joining Georgia Tech, he was with IBM working on packaging for supercomputers. He is the author of 450+ refereed technical publications, holds 30 patents, primary author and co-editor of 3 books, founder and co-founder of two start-up companies (E-System Design and Jacket Micro Devices) and founder of the IEEE Conference Electrical Design of Advanced Packaging and Systems (EDAPS), a premier conference sponsored by the EP (formerly CPMT) society. He is an IEEE Fellow and has served as the Distinguished Lecturer for the IEEE EMC society. He received his MS and PhD degrees in Electrical Engineering from Syracuse University in 1989 and 1991, respectively
Kindly confirm your participation by dropping a mail to suresh.v.subramanyam@intel.com and arkaprovo@simyog.com, by 5th June 2018, if you are planning to attend. Please provide your name, name of the organization, email-id and IEEE Membership number ( if you are an IEEE member).
