To view complete details for this event, click here to view the announcement

TekTalk on”Analog Layout” By Dr. S. L. Pinjare

IEEE Sensor Council Bangalore Chapter

First TekTalk on”Analog Layout” By Dr. S. L. Pinjare

Venue:

1. S. Engineering College
   Navarathna Agrahara,Sadahalli P.O.,
   Off Bengaluru International Airport,
   Bengaluru - 562 110,
   Karnataka, INDIA

This seminar will cover the basic principles of analog layout. It is important to be parasitics aware while doing the analog layout. The techniques used for reduction of parasitics and also for matching transistor layouts will be discussed.

About the Speaker:

Dr. Pinjare is Senior Professor at Department of ECE Nitte meenakshi Institute of Technology, Bangalore. He has over 30 years of research and teaching experience. He has worked in different positions as Senior Scientific Officer at IISC, Deputy Chief engineer at ITI Limited, Head Of PG program(MEMS) at MS Ramaiah Scool of advanced studies, Head PG program (VLSI) at  NMIT and Head of School of Electronics and Communications Engineering at REVA University.  He has published over 50 research papers in national and international journals.

He has designed and fabricated Silicon MEMS directional microphone and Acoustic Wave filter chips. These microphones are very tiny about 2mm in size. These microphones can be used for determining direction of sound such as coming from bomb blast in battle field or can also be used in hearing aids to cut down the sound coming from sides.

He is instrumental in setting up National MEMS design centre at and a centre for Nanocomposites and MEMS application at NMIT.

He was a Post-doctoral Research Fellow at Laboratoire de Physique des Solides, Universite de Paris‑Sud Orsay (France).

He was involved in Setting up of Electron Beam Lithography-based Mask Center for fabrication of Masks for VLSI chip production at Indian Telephone Industries Limited (ITI Ltd.), Bangalore, setting up of Semiconductor Wafer Characterization facility at Indian Institute of Science (IISc), Bangalore.

His expertise includes MEMs, VLSI and Microelectronics. He is currently working on application of image processing to precision agriculture, error detection and correction in underwater communication and silicon microphones

What the Course Covers:

• After completing the two-day seminar, the student will be able to understand the major elements of an IC development flow. This includes being able to draw circuits of simple complexity using CMOS transistors and applying good industry layout practices to determine whether the layout is correct to the schematic.

Date and Time

• Date: 08 March 2018
• Time: 02:00 PM to 04:00 PM
• All times are Asia/Calcutta
• Add to Google Calendar

Location

• M S Engineering College
• Sadahalli
• Bangalore, Karnataka
• India

Contact

• Email event contact
• Co-sponsored by cyrilyahoo@gmail.com

Registration

• No Admission Charge
• Starts 06 March 2018 07:34 AM
• Ends 07 March 2018 11:55 PM
• All times are Asia/Calcutta

• Register Now