Hello all,
A Happy new year 2018 greetings to all. IEEE CIS/GRSS is organizing a expert talk on Autonomous Car-- A New Driver for Resiliency and Testability @Muffakham Jah College of Engg. & Tech on 7th Jan 2018 from 3:00 PM to 4:30 PM by Dr Nirmal Saxena, Distinguished Engineer NVIDIA and Fellow IEEE. The details are enclosed.
Date, Time & Location
Sunday, 07th January 2018 Timing: 3:00 PM to 4:30 PM Venue: Conference Hall, Ground Floor, Block-5 Muffakham Jah College of Engg. & Tech., Road no 3, Banjara hills, Hyderabad. No Registration Fee
For queries please contact:
IEEE CIS Chapter Leadership Dr. Naresh M, Chair, naresh.k.m@ieee.org Mobile : 9392431163
Dr. K. S. Rajan, Vice-Chair rajan@iiit.ac.in
Dr. T.Hitendra Sarma, Secretary/Treasurer, hitendrasarma@ieee.org, Mobile : 9493239032
Coordinator:
Dr.Mousmi Ajay Chaurasia MJCET CIS Chapter Advisor mousmi.ksu@ieee.org +91-91601-46701
Abstract
Autonomous or self-driving car initiative is creating a new center stage for resilient computing and design for testability. This is very apparent from reading the ISO26262 specification, which is about the functional safety for automotive equipment applicable throughout the lifecycle of all automotive electronic and electrical safety-related systems. One of the key use case for self-driving car is neural-network based deep learning. Reliability models that explore the dynamic trade-offs between resiliency and performance requirements for deep learning are examined. The talk concludes with a perspective on the most important focus areas for automotive functional safety.
Short Biography of the Speaker
Dr. Nirmal R. Saxena is currently a distinguished engineer at NVIDIA and is responsible for high-performance and automotive resilient computing. From 2011 to 2015, he was associated with Inphi Corp as CTO for Storage & Computing and with Samsung Electronics as Sr. Director working on fault-tolerant DRAM memory and storage array architectures. From 2006-2011, Dr. Nirmal held roles as a Principal Architect, Chief Server Hardware Architect & VP at NVIDIA. From 1991 through 2009, he was also associated with Stanford University’s Center for Reliable Computing and EE Department as Associate Director and Consulting Professor respectively. During his association with Stanford University, he taught courses in Logic Design, Computer Architecture, Fault-Tolerant Computing, supervised six PhD students and was co-investigator with Professor Edward J. McCluskey on DARPA’s ROAR (Reliability Obtained through Adaptive Reconfiguration) project. Dr. Nirmal was the Executive VP, CTO, and COO at Alliance Semiconductor, Santa Clara. Prior to Alliance, he was VP of Architecture at Chip Engines. Dr. Nirmal has received his BE ECE degree (1982) from Osmania University, India; MSEE degree (1984) from the University of Iowa; and Ph.D. EE degree (1991) from Stanford University. He is a Fellow of IEEE (2002) and was cited for his contributions to reliable computing.
Best Regards
Naresh
