Tech Talk on Friday, 12th May, by Prof Madhavan Swaminathan, Director C3PS, Georgia Tech - Power Del
Dear Member,
IEEE CPMT Bangalore Chapter is organizing a tech talk this Friday. Please find the details of the talk and venue; a PDF of the same is attached.
Kindly Confirm your participation through email to: arkaprovo@simyog.com
Tech Talk: Friday, 12th May 2017, 4PM-6PM
Location: BHIVE HSR Layout Sect 6
L-148, 5th Main,
Sector 6, HSR Layout,
Bangalore, Karnataka- 560102
https://bhiveworkspace.com/locations/hsr-layout-sector-6/
Pls note that BHIVE does not have vehicle parking space. You will have to park in the by-lanes.
IEEE CPMT Bangalore Chapter Event
Power Delivery & Machine Learning: Their Role in IC, Package & System Design
Madhavan Swaminathan
John Pippin Chair in Microsystems Packaging & Electromagnetics
Director, Center for Co-Design of Chip, Package, System (C3PS)
School of Electrical and Computer Engineering, Georgia Tech, USA
Abstract:
A combination of "Moore" (IC) and "More than Moore" (package) scaling has led to the shrinking of electronic systems over the last several decades, and this trend is expected to continue into the future. Power delivery represents an important part of design where energy needs to be conserved while powering the load. This requires advanced concepts in power delivery architectures that require the integration of DC/DC converters with SOCs. With integration comes complexity where optimization of systems can become challenging. Machine learning, a promising approach derived from artificial intelligence, has recently shown promise for addressing such complex engineering optimization problems.
This talk will cover ongoing research and thoughts based on two large programs, namely Power Delivery for Electronic Systems (PDES) consortium at Georgia Tech and Center for Advanced Electronics through Machine Learning (CAEML), a collaborative NSF Center between UIUC, GT and NCSU.
Biography:
Madhavan Swaminathan is the John Pippin Chair in Microsystems Packaging & Electromagnetics in the School of Electrical and Computer Engineering (ECE) and Director of the Center for Co-Design of Chip, Package, System (C3PS), Georgia Tech. He formerly held the position of Joseph M. Pettit Professor in Electronics in ECE and Deputy Director of the NSF Microsystems Packaging Research Center, Georgia Tech. Prior to joining Georgia Tech, he was with IBM working on packaging for supercomputers. He is the author of 450+ refereed technical publications, holds 29 patents, primary author and co-editor of 3 books, founder and co-founder of two start-up companies (E-System Design and Jacket Micro Devices) and founder of the IEEE Conference Electrical Design of Advanced Packaging and Systems (EDAPS), a premier conference sponsored by the CPMT society. He is an IEEE Fellow and has served as the Distinguished Lecturer for the IEEE EMC society. He received his MS and PhD degrees in Electrical Engineering from Syracuse University in 1989 and 1991, respectively.
Regards,
Suresh Subramanyam
Chapter Chair
Arkaprovo Das
Chapter Secretary
On behalf of the committee members of IEEE CPMT Bangalore Chapter
