Reminder: Gearing Towards Designing Energy-Efficient AI Processors - In-person Presentation : vTools eNotice

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Gearing Towards Designing Energy-Efficient AI Processors - In-person Presentation

IEEE SSCS Boise Chapter – Invitation

The IEEE Solid-State Circuits Society (SSCS) – Boise Chapter is excited to invite you to our first chapter activity of 2026. We hope you will join us for an engaging technical presentation and networking opportunity.

📅 Event Details

When: Thursday, March 26, 2026
Time: 5:30 PM – 6:30 PM
Where: MEC309, Micron Engineering Center
Boise State University Campus

🎤 Technical Presentation

Title: Gearing Towards Designing Energy-Efficient AI Processors
Speaker: Dr. Omiya Hassan
Assistant Professor, Department of Electrical and Computer Engineering
Boise State University

📄 Abstract

As Artificial Intelligence (AI) continues to scale, the gap between required computing capability and existing hardware resources continues to widen. This talk will provide an overview of architectural innovations and optimization strategies for building high-performance, energy-efficient AI processors. Dr. Hassan will discuss the industry’s transition toward domain-specific architectures (DSAs) and examine methodologies for estimating and reducing energy consumption in deep neural network (DNN) and large language model (LLM) hardware. The presentation will highlight emerging approaches that balance performance, scalability, and energy efficiency in next-generation AI systems.

👩‍🏫 Speaker Bio

Dr. Omiya Hassan joined Boise State University in 2023 and is currently a tenure-track Assistant Professor in the Department of Electrical and Computer Engineering. She received her Ph.D. in Electrical Engineering and Computer Science from the University of Missouri and earned her B.S. in Electrical and Electronics Engineering from United International University, Bangladesh, in 2017.

Dr. Hassan leads the LPiNS (Low-Power Integrated Circuits and Embedded Systems) Laboratory, where her group models and develops energy-efficient algorithms and complementary low-power processors at the IC and RTL levels for emerging computer architectures. Her research spans both foundational and applied domains, with applications ranging from biomedical devices to near-memory processing architectures. She is currently leading efforts focused on the design and development of 3D-stacked, near-memory heterogeneous computing architectures for large-scale parallel and AI workloads.

📝 RSVP

Please RSVP (register below) so we can ensure adequate refreshments for the event.

We look forward to seeing you there!