IEEE EDS/PHO Columbus DL Speaker: Low Power IC Design for a Sustainable World (Grimblatt) : vTools eNotice

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IEEE EDS/PHO Columbus DL Speaker: Low Power IC Design for a Sustainable World (Grimblatt)

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IEEE EDS/PHO Columbus DL Speaker: Low Power IC Design for a Sustainable World (Victor Grimblatt, Ph.D., Synopsys Chile Innovation Center)

Abstract: In an era where sustainability is essential, designing low-power integrated circuits (ICs) plays a crucial role in reducing energy consumption and mitigating environmental impact. This talk examines innovative strategies in low-power IC design to meet the increasing demand for energy-efficient electronics, from IoT devices to large-scale computing systems. By utilizing advanced techniques such as subthreshold operation, power gating, clock gating, and dynamic voltage scaling, we outline a framework for optimizing performance while minimizing power dissipation. The discussion emphasizes the interplay between circuit-level innovations, such as the strategic use of clock gating to reduce dynamic power in idle states, process technology advancements, and system-level integration, highlighting their collective contribution to sustainability. Through simulations and case studies, we demonstrate how these approaches can significantly lower the carbon footprint of electronic systems, paving the way for greener technology solutions that align with global sustainability goals.