BEGIN:VCALENDAR VERSION:2.0 PRODID:IEEE vTools.Events//EN CALSCALE:GREGORIAN BEGIN:VTIMEZONE TZID:America/Sao_Paulo BEGIN:DAYLIGHT DTSTART:20380119T001407 TZOFFSETFROM:-0300 TZOFFSETTO:-0300 RRULE:FREQ=YEARLY;BYDAY=3TU;BYMONTH=1 TZNAME:-03 END:DAYLIGHT BEGIN:STANDARD DTSTART:20190216T230000 TZOFFSETFROM:-0200 TZOFFSETTO:-0300 RRULE:FREQ=YEARLY;BYDAY=3SA;BYMONTH=2 TZNAME:-03 END:STANDARD END:VTIMEZONE BEGIN:VEVENT DTSTAMP:20250413T140200Z UID:37E63AF3-A8C1-4451-9A00-13CDCE66D715 DTSTART;TZID=America/Sao_Paulo:20250414T133000 DTEND;TZID=America/Sao_Paulo:20250414T150000 DESCRIPTION:Embedded HPC & Reliable Accelerator Integration in the AI Age b y Open EDA & Eco Systems\n\nIncreasing emerging fields towards reliable em bedded accelerator and processor integration\, incl. High-Performance Comp uting(HPC) systems\, are “essential and challenging forces” driving ac tual and future silicon technologies. This results in heterogenous multi-c ore (MC)\, various vector accelerator incl. artificial intelligence (AI) a nd networked cyber-physical systems (CPS) integration. Here\, on one side increasing monolythic integration of cooperating computational and physica l sensor components is necessary\, e. g. in embedded and smart on-demand a utomatized environments as diverse as applied in communication/consumer\, automotive/transportation\, avionics\, civil infrastructure\, energy\, hea lthcare\, manufacturing (Industry 4.0)\, and also space appliances. Moreov er\, future complex dynamically adaptive and multi-domain electronic syste m integration tends to be more and more dependent on distributed real-time and embedded HPC availability. This results in the strong demand of newly operating decentralized/centralized intelligent\, interconnected\, and si licon technology integrated solutions\, subject to increased performance n eeds to facilitate computationally intensive algorithms\, power consumptio n to be minimized\, as well as sufficient degrees of reliability and verif iability to employ digital systems in highly networked as well as safety-c ritical environments\, e. g. in future embedded\, incl.6G\, automotive etc . system integration\, driven by software-defined approaches. Existing tec hnologies must evolve in order to meet such scalable and high requirements \, whereas Open Source Hardware & Softwareincl. explainable AI-based compo nents will also play key roles in this actual dynamic development. Multipu rpose adaptivity\, connectivity and reliability are crucial\, especially i n scaling down silicon technologies according to “Extending Moore” for future processor technologies incl. dynamically reconfigurable and AI-dri ven accelerators. This requires new open EDA approaches with standardized tool flows towards efficient heterogenous system integration. The talk wil l present important challenges of high-end heterogenous Multi-Core/Acceler ator HPC platforms by reliable SoC and SiPhardware/software integration wi th smart\, scalable\, reliable & embedded accelerator & processor solution s. This includes corresponding Global Ecosystem discussions in the presenc e of RISC-V\, national & European Chipact\, 6G and automotive initiatives whereas necessary AI & chipdesign aspects have to be considered.\n\nThe ta lk will in addition sketch in this context some selected communication & a utomotive related project initiatives like Open6GHub (6G for Society and S ustainability - https://www.open6ghub.de/en/)\, EPI (European Processor In itiative - [https://www.european-processor-initiative.eu](https://www.euro pean-processor-initiative.eu/))\, XANDAR (Safety and Security for Embedded Software Systems - [https://xandar-project.eu](https://xandar-project.eu/ ))\, ZuSE-KI-mobil (Platform for energy-efficient AI processors in mobile applications - https://www.itiv.kit.edu/english/201_8016.php)\, and the na tional project CeCaS (CentralCarServer - https://www.itiv.kit.edu/english/ 201_8769.php)\, among others.\n\nCo-sponsored by: UFRGS\n\nSpeaker(s): Jur gen Becker\, \n\nBldg: 43413\, Av. Bento Gonçalves\, 9500 - UFRGS Campus do Vale\, Auditório do Instituto de Informática\, Porto Alegre\, Rio Gra nde do Sul\, Brazil\, 91509-900 LOCATION:Bldg: 43413\, Av. Bento Gonçalves\, 9500 - UFRGS Campus do Vale\, Auditório do Instituto de Informática\, Porto Alegre\, Rio Grande do Su l\, Brazil\, 91509-900 ORGANIZER:grellert@ieee.org SEQUENCE:8 SUMMARY:Embedded HPC & Reliable Accelerator Integration in the AI Age by Op en EDA & Eco Systems URL;VALUE=URI:https://events.vtools.ieee.org/m/481098 X-ALT-DESC:Description:
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Embedded HPC &\; Relia ble Accelerator Integration in the AI Age by Open EDA &\; Eco Systems
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Increasing emerging fields towards reliable embedded acce lerator and processor integration\, incl. \;High-Performance Compu ting(HPC) \;systems\, are &ldquo\;essential and challeng ing forces&rdquo\; driving actual and future silicon technologies. This re sults in heterogenous \;multi-core \;(MC)\, various vecto r accelerator incl. \;artificial intelligence \;(AI) and networked \;cyber-physical systems \;(CPS) integration. H ere\, on one side increasing monolythic integration of cooperating computa tional and physical sensor components is necessary\, e. g. in embedded and smart \;on-demand \;automatized environments as diverse as applied in communication/consumer\, automotive/transportation\, avionic s\, civil infrastructure\, energy\, healthcare\, manufacturing (Indust ry 4.0)\, and also space appliances. Moreover\, future complex dynami cally adaptive and multi-domain electronic system integration tends to be more and more dependent on distributed real-time and \;embedded HP C \;availability. This results in the strong demand of newly oper ating decentralized/centralized intelligent\, interconnected\, and silicon technology integrated solutions\, subject to increased performance needs< strong> \;to facilitate computationally intensive algorithms\ , power consumption \;to be minimized\, as well as su fficient degrees of reliability and verifiability to employ digital system s in highly networked as well as safety-critical environments\, e. g. in f uture embedded\, incl.6G\, automotive etc. system integration\, driven by software-defined approaches. \;Existing tech nologies must evolve in order to meet such scalable and high requirements\ , whereas \;Open Source Hardware \;&\ ; \;Softwareincl. \;explainable AI-based components will \;also \;play \;key roles in this actual dynamic development. Multip urpose adaptivity\, connectivity and reliability are crucial\, especially in scaling down silicon technologies according to &ldquo\;Extending Mo ore&rdquo\; for future processor technologies incl. dynamically recon figurable and AI-driven accelerators. This requires \;new open EDA approaches with standardized tool flows towards eff icient heterogenous system integration.  \;The talk will presen t important challenges of high-end heterogenous \;Multi-Core/Accel erator \;HPC \;platforms by  \;reliable SoC \;and \;SiPhardware/software integration with smart\, scalable\, reliable &\; embedded accelerator &\; processor solutions. This includes corresponding \;Global E cosystem \;discussions in the presence of \;RISC-V\, national &\; \;European Chipact\, \;6G \ ;and \;automotive \;initiatives whereas necessary AI & \; chipdesign aspects have to be considered. \;
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The talk will in addition sketch in this context some selected&n bsp\;communication \;&\; \;automotive \;r elated project initiatives like \;Open6GHub& nbsp\;(6G for Society and Sustainability \;- \;https://www.open6ghub.de/en/)\, \;EPI \;(European Processor Initiative -  \;https://www.euro pean-processor-initiative.eu)\, \;XANDAR \;(Safety and Security for Embedded Software Systems - \ ;https://xandar-project.eu)\ , \;ZuSE-KI-mobil \;(Platform for energy -efficient AI processors in mobile applications - \;https://www.itiv.kit.edu/english/201 _8016.php)\, and the national project \;CeCaS \;(CentralCarServer \;- \;https://www.itiv.kit.edu/english/201_87 69.php)\, among others.
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