Synopsys seminar in Madrid
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Synopsys seminar in Madrid
The Spain Chapter of the IEEE Council on Electronic Design Automation (CEDA) presents a Synopsys seminar in Madrid.
The topics are:
1) Analog custom design and verification (schematic-layout-simulation-p
2) Digital implementation flow: Synthesis and Place&Route flows and tools.
Date and Time
- Date: 29 January 2018
- Time: 10:00 AM to 05:00 PM
- All times are Europe/Madrid
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Location
- Calle Profesor José García Santesmases, 9
- Madrid, Madrid
- Spain 28040
- Building: UCM: Facultad de Informática
- Click here for Map
Contact
Registration
- No Admission Charge
- Starts 11 January 2018 01:00 PM
- Ends 28 January 2018 10:00 AM
- All times are Europe/Madrid
